STMicroelectronics Exploring Current Sense Amp리파이어 사용 설명서

STMicroelectronics Exploring Current Sense Amp리퍼

주요 매개변수

설정

1. Identify the datasheet common-mode voltage icmDS used to specify the input offset voltage IO/Vio.
2. Determine your application common-mode voltage icm.
3. If icm differs from icmDS, estimate the additional offset due to CMRR using: Offset due to CMRR = ((icm – icmDS) * 10^(CMRR/20)).
4. Add this CMRR-induced offset term to the datasheet IO/Vio to obtain total current-measurement error contribution.
5. When evaluating accuracy, compare the CMRR-related error with the error due to IO (ideally same order of magnitude).

제품 정보

This presentation provides a written explanation of the topic covered in the fifth chapter of the video: “Common-mode rejection ratio (CMRR) #6”, which is available on our YouTube channel at the following link:
https://www.youtube.com/watch?v=AWcZ3SpFf-M&list=PLTJzs51NlEIAbbaIen42VfvXpeW3-Yh-M&index=6

추천사항
In this document you will find key concepts explained through informative tables, graphs, sequences of graphs, followed by a detailed explanation.

• When you see this icon:
• Each explanation page shows the page or page range where the topic is explained:
• 이 아이콘이 표시되는 경우:

What is the common-mode rejection ratio

CMRR

CMRR

설명

CMRR is the ratio of differential voltage gain to common-mode voltag전자 이득.
Practically, it is measured as the ratio between a change in input common-mode voltage and the resulting change in input offset voltage.
In datasheets, CMRR appears in the DC and/or AC parameter sections. Here we focus on DC CMRR. As shown in the TSC2010 current-sense amplifier datasheet, CMRR is usually given in dB, emphasizing that it is a ratio.

우리의 전amp르 :

• The shunt voltage Vsense is constant.
• 출력 볼륨tage is therefore expected to be stable.

On the oscilloscope:

• The yellow trace shows the output voltage.
• The red trace shows the common-mode voltage, varied from 0 V to 70 V.

Animation explanation:
During the test, only the common-mode voltage is swept, while Vsense remains constant.

• The yellow curve shows that the output voltage changes with the common-mode voltage.
• Since Vsense does not change, this comes from the amplifier’s input-offset voltage ??? ,which depends on the common-mode voltage.

CMRR expresses how ??? varies with common-mode voltage.
Because it is expressed in dB, a lower CMRR value means worse common-mode rejection and thus a larger equivalent input voltage variation for a given change in common-mode voltage.

Common-mode rejection ratio origin 1
입력 stage of current sensing

설명

In current-sense amplifiers, CMRR has several origins.
A first one is that the input common-mode voltage sets the bias point of the input differential pair.
Due to inherent mismatches in the circuitry, changing this bias point changes the input-offset voltage ??? ,which in turn changes the output voltage.
It also depends on the input architecture.
To support a wide common-mode range, a classical current-sensing front end can use two stag에스:

• an N-stage for the upper ???? range
• a P-stage for the lower ???? range

As seen previously, mismatch between two NMOS devices, or between two PMOS devices, generates ??? . There is no correlation between NMOS mismatch and PMOS mismatch.

각 stage therefore generates its own ???.
At low common-mode voltage, the P-stage is active and adds its own the offset.

N-stag전자 오프셋
At high common-mode voltage, the N-stage becomes active and its own ??? dominates.
Depending on the application ???? ,the effective ??? can thus be different.
In precision applications, the key objective is to minimize the jump in ??? when the signal switches from one stage를 다른 쪽으로.
CMRR as slope
On the ??? versus ???? curve, CMRR corresponds to the slope between ????,??? and ????,???. The flatter this slope, the more precise the device.

Common-mode rejection ratio origin 2
Gain resistance mismatch

Differential architecture and resistor matching

1. Differential-amp리퍼 모델
   • A traditional current-sense stage can be modeled, to first order, as a differential amplifier. Its transfer function is given bythe equation shown.
2. Ideal case vs. real resistor matching
   • If the gain resistors are ideally matched (?1 = ?2 and ?3 = ?4) , this expression simplifies to the ideal differential-amplifier equation.
   • In reality, as already seen with ?IO ,perfect matching is impossible: the gain resistors always exhibit a matching error, which depends on the technology. Thin-film resistors offer very good native matching, but still not perfect.
   • By introducing this mismatch as a resistance-ratio error ?, we obtain the modified transfer function shown.
3. Separation into two terms
   • In this final equation, we can clearly identify two contributions: a differential term and a common-mode term, which will be analyzed on the next slides.

차동 이득
The first term is the differential gain.
It amplifies the difference ??+ − ??− and represents the useful part of the signal for current sensing.
Common-mode gain
The second term is the common-mode gain.
It converts the common-mode input voltage into an additional output component and therefore degrades the measurement accuracy.
CMRR and impact of resistor mismatch
The common-mode rejection ratio (CMRR) is the ratio between differential gain and common-mode gain. The higher this ratio, the more accurately common-mode signals are rejected.
In a differential configuration, any mismatch of the gain resistors directly affects the output and thus the CMRR: if the resistors are not perfectly matched, the common-mode voltage ?CM is only partially rejected.
Consequently, resistor matching is a key determinant of CMRR in current-sense amplifiers, often even more critical than input-stag전자 불일치.

How CMRR affects precision

We have identified the different internal origins of common-mode related errors in a current-sense amp리퍼.
Now we examine how CMRR affects the accuracy of the current measurement.
From datasheet CMRR to offset at our Vicm
Let us consider the TSC2010 bidirectional current-sense amp리퍼.
In the datasheet, unless otherwise specified, parameters are defined and guaranteed for a common-mode voltage ?icmDS = 12 V.
The input offset voltage ?IO given in the datasheet is therefore valid only at this common-mode voltage.
If our application uses a different common-mode ?icm ,we need to estimate the new offset. We do this by using the CMRR value specified in the datasheet.
Because CMRR is usually expressed in dB, we first convert it to a gain ratio, then we apply:

Using the offset variation
We must clearly distinguish:

• The application common-mode ?icm ,and
• The reference common-mode ?icmDS used for ?IO in the datasheet.

The equation above gives the additional offset caused by operating at ?icm instead of ?icmDS.
This extra term must be added to the datasheet ?IO when calculating the total error on the current measurement.
Expressing the CMRR error in %
The error due to CMRR can also be expressed as a percentage. In this case, it is appropriate to express this error as a ratio of the voltage at the shunt terminals.
On the slide, the formula is:

어디:

• ?icm is the common-mode voltage in the application,
• ?icmDS is the common-mode voltage used in the datasheet for ?IO parameter,
• ?shunt × ?sense is the shunt voltage, 그리고
• 10CMRR/20 is the CMRR converted from dB to a linear ratio.

When evaluating accuracy, this CMRR-related error should be compared with the error due to ?IO ;ideally both should be of the same order of magnitude.

Example with Vicm = 12 V
To illustrate the impact of CMRR on current-measurement accuracy, let us analyze a practical examp르.
We use the TSC2012, a bidirectional current-sense amplifier with a gain of 100, operating at room temperature with a common-mode voltag12V의 e.

1. Datasheet common-mode condition
   • From the datasheet, the specified input common-mode voltage for this test condition is Vicm = 12 V.
2. Application common-mode condition
   • In our application, the common mode voltage is set to 12V. As shown in the CMRR impact equation, when the application Vicm is equal to the datasheet Vicm, the CMRR term becomes zero and therefore has no impact on the measurement error.
3. Resulting error contributor
   • In this situation, the only contributor is the input offset voltage Vio specified at Vicm = 12 V, which is 500 μV max at 25 °C.

Example with Vicm = 48 V
The blue curve on the graph shows the error due solely to CMRR. For Vicm = 12 V, there is no offset variation linked to common-mode voltage, so CMRR does not affect the measurement.
Now consider the same application, but with a 48 V common-mode voltage. Since Vio is not specified at 48 V in the datasheet, we estimate its variation using the CMRR equation.
For a 36 V change in common-mode voltage (from 12 V to 48 V), the input offset voltage increases by 1.4 mV.
The red curve represents the error due only to the CMRR effect, that is, the error introduced by the input offset voltage corresponding to the actual common-mode voltag응용 프로그램의 전자.
Therefore, whenever the application operates at a common-mode voltage different from the datasheet test condition, it becomes essential to include the CMRR-induced error in the overall accuracy calculation.

CMRR error summary

CMRR defines how the output voltage changes depending on the voltage applied to both input pins
It has the most significant impact at current
for a chosen device with good Vio, CMRR must also be good Two ways to minimize the offset error

• 증분asing the shunt resistance value
• Choose a device with lower input offset voltage and higher CMRR

문제 해결

• 징후: Output/current reading error increases when the application common-mode voltage differs from the datasheet test condition. 원인: Vio/IO is only guaranteed at icmDS, and CMRR causes additional input offset variation with common-mode voltage. 행동: Recalculate the CMRR-induced offset using your icm and the datasheet CMRR, then include it in the overall accuracy calculation.
• 징후: More error at low current (for a chosen device). 원인: CMRR has the most significant impact at low current (as stated in the CMRR error summary). 행동: Mitigate CMRR-related error by either increasing shunt resistance or selecting a device with lower input offset voltage and higher CMRR.
• 징후: Unexpected degradation in rejection of common-mode signals. 원인: Common-mode rejection degradation can originate from internal input-stage mismatch and from common-mode gain caused by gain-resistor mismatch. 행동: Prefer designs/components emphasizing resistor matching and good CMRR, as highlighted in the guide.

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